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Overview

Project website spinalhdl.github.io/SpinalDoc-RTD
Instructions for translators

SpinalHDL的使用说明
Project maintainers User avatar Readon User avatar SpinalHDL-CN User avatar tsy0123
Translation license CC0-1.0 SpinalHDL/Libraries/bus_slave_factory SpinalHDL/Developers area/bus_slave_factory_impl SpinalHDL/Getting Started/SBT SpinalHDL/Introduction/A simple example SpinalHDL/Introduction/faq SpinalHDL/Introduction/License SpinalHDL/Simulation/signal SpinalHDL/Simulation/clock SpinalHDL/Simulation/engine SpinalHDL/Simulation/threadLess SpinalHDL/Simulation/threadFull SpinalHDL/Simulation/sensitive SpinalHDL/Simulation/examples/uart_encoder SpinalHDL/Simulation/install/Icarus Verilog SpinalHDL/Simulation/install/GHDL SpinalHDL/Simulation/examples/asynchronous SpinalHDL/Simulation/install/index SpinalHDL/Simulation/examples/synchronous SpinalHDL/Simulation/install/Verilator SpinalHDL/Simulation/examples/uart_decoder SpinalHDL/Simulation/examples/single_clock_fifo SpinalHDL/Libraries/flow SpinalHDL/Examples/Simple ones/apb3 SpinalHDL/Data types/Int SpinalHDL/Data types/bundle SpinalHDL/Examples/Simple ones/color_summing SpinalHDL/Formal verification/index SpinalHDL/Design errors/nullpointerexception SpinalHDL/Design errors/scope_violation SpinalHDL/Examples/Advanced ones/index SpinalHDL/Getting Started/VSCodium SpinalHDL/Examples/Simple ones/sinus_rom SpinalHDL/Getting Started/Scala Guide/basics SpinalHDL/Libraries/Bus/tilelink/tilelink SpinalHDL/Libraries/EDA/altera/qsysify SpinalHDL/Getting Started/Cheatsheets/symbolic SpinalHDL/Libraries/Bus/index SpinalHDL/Getting Started/index SpinalHDL/Getting Started/Help for VHDL people/vhdl_perspective SpinalHDL/Getting Started/Scala Guide/coding_conventions SpinalHDL/Design errors/unassigned_register SpinalHDL/Design errors/assignment_overlap SpinalHDL/Design errors/unreachable_is_statement SpinalHDL/Other language features/index SpinalHDL/Libraries/EDA/altera/quartus_flow SpinalHDL/Other language features/assertion SpinalHDL/Examples/Advanced ones/pinesec SpinalHDL/Developers area/index SpinalHDL/Developers area/spinalhdl_datamodel SpinalHDL/Simulation/examples/dual_clock_fifo SpinalHDL/Developers area/types SpinalHDL/Developers area/mill support SpinalHDL/Getting Started/Cheatsheets/index SpinalHDL/Getting Started/Cheatsheets/core SpinalHDL/Legacy/index SpinalHDL/miscelenea/frequent_errors SpinalHDL/miscelenea/index SpinalHDL/Semantic/rules SpinalHDL/Design errors/hierarchy_violation SpinalHDL/Libraries/vexriscv SpinalHDL/Getting Started/Help for VHDL people/vhdl_comp SpinalHDL/Libraries/IO/readableOpenDrain SpinalHDL/Libraries/Graphics/vga SpinalHDL/Foreword/index SpinalHDL/Libraries/Com/index SpinalHDL/Libraries/IO/tristate SpinalHDL/Legacy/pinsec/software SpinalHDL/Libraries/regIf SpinalHDL/Sequential logic/registers SpinalHDL/Other language features/analog_inout SpinalHDL/Other language features/vhdl_generation SpinalHDL/Libraries/binarySystem SpinalHDL/Libraries/Bus/amba3/ahblite3 SpinalHDL/Semantic/assignments SpinalHDL/Simulation/bootstraps SpinalHDL/Simulation/index SpinalHDL/Libraries/stream SpinalHDL/Data types/bool SpinalHDL/Getting Started/IntelliJ SpinalHDL/Legacy/riscv SpinalDoc-RTD SpinalHDL/Structuring/area SpinalHDL/miscelenea/core/core_components SpinalHDL/Examples/Intermediates ones/uart SpinalHDL/Structuring/blackbox SpinalHDL/Data types/Vec SpinalHDL/Examples/index SpinalHDL/Semantic/when_switch SpinalHDL/Other language features/utils SpinalHDL/Libraries/Com/uart SpinalHDL/Developers area/howtodocument SpinalHDL/Examples/Intermediates ones/index SpinalHDL/Structuring/components_hierarchy SpinalHDL/Structuring/function SpinalHDL/Examples/Simple ones/rgb_to_gray SpinalHDL/Getting Started/Cheatsheets/lib SpinalHDL/Getting Started/Help for VHDL people/index SpinalHDL/Structuring/parametrization SpinalHDL/Getting Started/Scala Guide/interaction SpinalHDL/Introduction/Projects using SpinalHDL SpinalHDL/Introduction/index SpinalHDL/Legacy/pinsec/index SpinalHDL/Libraries/fiber SpinalHDL/Libraries/index SpinalHDL/Introduction/Contributing SpinalHDL/Design errors/register_defined_as_component_input SpinalHDL/Introduction/SpinalHDL SpinalHDL/Libraries/Misc/index SpinalHDL/miscelenea/chisel SpinalHDL/Design errors/no_driver_on SpinalHDL/Other language features/scope_property SpinalHDL/Other language features/stub SpinalHDL/Semantic/index SpinalHDL/Sequential logic/index SpinalHDL/Simulation/examples/index index SpinalHDL/Structuring/index SpinalHDL/Sequential logic/memory SpinalHDL/Examples/Simple ones/carry_adder SpinalHDL/Examples/Simple ones/index SpinalHDL/Examples/Simple ones/counter_with_clear SpinalHDL/Examples/Advanced ones/jtag SpinalHDL/Libraries/utils SpinalHDL/Examples/Simple ones/pll_resetctrl SpinalHDL/Examples/Intermediates ones/fractal SpinalHDL/Design errors/index SpinalHDL/Data types/enum SpinalHDL/Data types/Fix SpinalHDL/Design errors/width_mismatch SpinalHDL/miscelenea/core/elements SpinalHDL/Design errors/clock_crossing_violation SpinalHDL/Libraries/Bus/avalon/avalonmm SpinalHDL/Libraries/Bus/amba4/axi4 SpinalHDL/Libraries/Com/usb_device SpinalHDL/Simulation/simulator_specifics SpinalHDL/Getting Started/Install and setup SpinalHDL/Introduction/Other learning materials SpinalHDL/Examples/Intermediates ones/vga SpinalHDL/Examples/Advanced ones/timer SpinalHDL/Examples/Advanced ones/memory_mapped_uart SpinalHDL/Data types/AFix SpinalHDL/Libraries/Com/spiXdr SpinalHDL/Libraries/Pipeline/index SpinalHDL/Libraries/Misc/service_plugin SpinalHDL/Structuring/clock_domain SpinalHDL/Libraries/Pipeline/introduction SpinalHDL/Structuring/naming SpinalHDL/Introduction/Getting in touch SpinalHDL/Data types/bits SpinalHDL/Examples/Advanced ones/slots SpinalHDL/Libraries/fsm SpinalHDL/Getting Started/Scala Guide/index SpinalHDL/Legacy/pinsec/hardware SpinalHDL/Legacy/pinsec/introduction SpinalHDL/Legacy/pinsec/hardware_toplevel SpinalHDL/Data types/Floating SpinalHDL/Design errors/latch_detected SpinalHDL/Other language features/report SpinalHDL/Design errors/spinal_cant_clone SpinalHDL/Data types/index SpinalHDL/Simulation/install/VCS SpinalHDL/Libraries/EDA/index SpinalHDL/Design errors/combinatorial_loop SpinalHDL/Libraries/Graphics/index SpinalHDL/Design errors/iobundle SpinalHDL/Design errors/out_of_range_constant SpinalHDL/Libraries/Bus/tilelink/tilelink_fabric SpinalHDL/Libraries/Graphics/colors SpinalHDL/Libraries/IO/index SpinalHDL/Libraries/Com/usb_ohci SpinalHDL/Libraries/Bus/amba3/apb3 SpinalHDL/Libraries/Misc/PLIC/plic_mapper SpinalHDL/Libraries/fragment
17 minutes ago

String statistics

Strings percent Hosted strings Words percent Hosted words Characters percent Hosted characters
Total 5,654 49,677 320,023
Approved 99% 5,616 99% 49,627 99% 319,668
Waiting for review 1% 38 1% 50 1% 355
Translated 100% 5,654 100% 49,677 100% 320,023
Needs editing 0% 0 0% 0 0% 0
Read-only 0% 0 0% 0 0% 0
Failing checks 3% 212 1% 474 1% 4,772
Strings with suggestions 4% 278 9% 4,633 9% 29,595
Untranslated strings 0% 0 0% 0 0% 0
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Changes committed

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  3. Chinese (Simplified)
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from the first one to the last one
从第一个节点到最后一个节点
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Translation changed

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from the first one to the last one
从第一个节点到最后一个节点
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  3. Chinese (Simplified)
There is also an ``ResetCtrl.asyncAssertSyncDeassertDrive`` version of tool which directly assign the ``clockDomain`` reset with the filtered value.
另外还有一个 ``ResetCtrl.asyncAssertSyncDeassertDrive`` 版本的工具，它直接使用筛选后的值新构造的复位信号作为 ``clockDomain`` 这个时钟域的复位赋值。
yesterday
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ClockDomain which will use the filtered value
返回将使用所筛选值的新复位信号对齐的时钟域(ClockDomain)
yesterday
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Signal that should be filtered
被筛选的信号输入的异步信号，用于触发复位
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You can filter an asynchronous reset by using an asynchronously asserted synchronously deaserted logic. To do it you can use the ``ResetCtrl.asyncAssertSyncDeassert`` function which will return you the filtered value.
您可以使用“异步有效同步无效”的逻辑来筛选构造异步复位。为此，您可以使用 ``ResetCtrl.asyncAssertSyncDeassert`` 函数返回筛选后的值构造的复位信号。
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Tick at an ``frequency`` rate
以 ``frequency`` 频率进行触发超时信号（tick）
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Tick after a ``time`` duration
在持续 ``time`` 时间后触发超时（tick）
yesterday
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Tick after ``cycles`` clocks
在 ``cycles`` 个时钟周期后触发超时（tick）
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