Component Total Dismissed Active Translated
index 3 3 0 0
SpinalHDL/Data types/AFix 1 1 0 0
SpinalHDL/Data types/bits 36 24 12 12
SpinalHDL/Data types/bool 18 10 8 8
SpinalHDL/Data types/bundle 5 5 0 0
SpinalHDL/Data types/enum 12 7 5 5
SpinalHDL/Data types/Fix 32 26 6 6
SpinalHDL/Data types/Floating 15 15 0 0
SpinalHDL/Data types/Int 95 77 18 18
SpinalHDL/Data types/Vec 15 15 0 0
SpinalHDL/Design errors/clock_crossing_violation 2 2 0 0
SpinalHDL/Developers area/bus_slave_factory_impl 33 30 3 3
SpinalHDL/Developers area/types 53 45 8 8
SpinalHDL/Examples/Advanced ones/memory_mapped_uart 8 5 3 3
SpinalHDL/Examples/Advanced ones/pinesec 1 1 0 0
SpinalHDL/Examples/Advanced ones/timer 18 18 0 0
SpinalHDL/Examples/Intermediates ones/fractal 6 6 0 0
SpinalHDL/Examples/Intermediates ones/uart 20 20 0 0
SpinalHDL/Examples/Intermediates ones/vga 8 8 0 0
SpinalHDL/Examples/Simple ones/apb3 3 3 0 0
SpinalHDL/Examples/Simple ones/rgb_to_gray 2 2 0 0
SpinalHDL/Examples/Simple ones/sinus_rom 6 5 1 1
SpinalHDL/Formal verification/index 15 15 0 0
SpinalHDL/Getting Started/Cheatsheets/symbolic 1 1 0 0
SpinalHDL/Getting Started/Help for VHDL people/vhdl_comp 2 2 0 0
SpinalHDL/Getting Started/Help for VHDL people/vhdl_perspective 10 6 4 4
SpinalHDL/Getting Started/Install and setup 8 6 2 2
SpinalHDL/Getting Started/Scala Guide/basics 2 1 1 1
SpinalHDL/Getting Started/Scala Guide/coding_conventions 2 2 0 0
SpinalHDL/Introduction/Projects using SpinalHDL 4 1 3 3
SpinalHDL/Legacy/pinsec/hardware_toplevel 8 8 0 0
SpinalHDL/Legacy/pinsec/index 1 1 0 0
SpinalHDL/Legacy/riscv 1 1 0 0
SpinalHDL/Libraries/binarySystem 33 33 0 0
SpinalHDL/Libraries/Bus/amba3/ahblite3 3 3 0 0
SpinalHDL/Libraries/Bus/amba3/apb3 5 3 2 2
SpinalHDL/Libraries/Bus/amba4/axi4 22 22 0 0
SpinalHDL/Libraries/Bus/avalon/avalonmm 7 7 0 0
SpinalHDL/Libraries/bus_slave_factory 24 24 0 0
SpinalHDL/Libraries/Bus/tilelink/tilelink 1 1 0 0
SpinalHDL/Libraries/Com/spiXdr 1 1 0 0
SpinalHDL/Libraries/Com/uart 14 14 0 0
SpinalHDL/Libraries/Com/usb_device 23 23 0 0
SpinalHDL/Libraries/EDA/altera/qsysify 2 2 0 0
SpinalHDL/Libraries/EDA/altera/quartus_flow 1 1 0 0
SpinalHDL/Libraries/fiber 1 1 0 0
SpinalHDL/Libraries/flow 11 9 2 2
SpinalHDL/Libraries/fragment 5 5 0 0
SpinalHDL/Libraries/fsm 8 7 1 1
SpinalHDL/Libraries/Misc/PLIC/plic_mapper 1 1 0 0
SpinalHDL/Libraries/Misc/service_plugin 5 0 5 5
SpinalHDL/Libraries/Pipeline/index 1 1 0 0
SpinalHDL/Libraries/Pipeline/introduction 32 32 0 0
SpinalHDL/Libraries/regIf 18 18 0 0
SpinalHDL/Libraries/stream 43 43 0 0
SpinalHDL/Libraries/utils 47 39 8 8
SpinalHDL/miscelenea/core/core_components 14 14 0 0
SpinalHDL/miscelenea/core/elements 6 1 5 5
SpinalHDL/miscelenea/frequent_errors 3 3 0 0
SpinalHDL/Other language features/assertion 2 2 0 0
SpinalHDL/Other language features/index 1 1 0 0
SpinalHDL/Other language features/scope_property 1 1 0 0
SpinalHDL/Other language features/utils 15 14 1 1
SpinalHDL/Other language features/vhdl_generation 15 15 0 0
SpinalHDL/Semantic/assignments 3 1 2 2
SpinalHDL/Semantic/when_switch 6 6 0 0
SpinalHDL/Sequential logic/memory 26 7 19 19
SpinalHDL/Sequential logic/registers 3 0 3 3
SpinalHDL/Simulation/bootstraps 15 6 9 9
SpinalHDL/Simulation/clock 27 1 26 26
SpinalHDL/Simulation/index 2 1 1 1
SpinalHDL/Simulation/install/VCS 6 0 6 6
SpinalHDL/Simulation/install/Verilator 1 0 1 1
SpinalHDL/Simulation/sensitive 2 0 2 2
SpinalHDL/Simulation/signal 11 1 10 10
SpinalHDL/Simulation/threadLess 1 0 1 1
SpinalHDL/Structuring/blackbox 4 0 4 4
SpinalHDL/Structuring/clock_domain 24 0 24 24
SpinalHDL/Structuring/components_hierarchy 8 6 2 2
SpinalHDL/Structuring/naming 1 1 0 0

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